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may 2009 doc id 14576 rev 2 1/28 28 TDA7491MV 25 w mono btl class-d audio amplifier features ? 20 w continuous output power: r l = 8 ? , thd = 10% at v cc = 18 v ? 25 w continuous output power: r l = 6 ? , thd = 10% at v cc = 16 v ? wide range single supply operation (5 v - 18 v) ? high efficiency ( = 90%) ? four selectable, fixed gain settings of nominally 20 db, 26 db, 30 db and 32 db ? differential inputs mi nimize common-mode noise ? filterless operation ? no ?pop? at turn-on/off ? standby and mute features ? short-circuit protection ? thermal overload protection ? externally synchronizable description the TDA7491MV is a mono btl class-d audio amplifier with single power supply designed for lcd tvs and monitors. thanks to the high efficiency and an exposed-pad-down (epd) package no heatsink is required. furthermore, the filterless operation allows a reduction in the external component count. the TDA7491MV is pin to pin compatible with the tda7491p, tda7491lp and tda7491hv for the left channel as given in section 6.1 on page 19 . powersso-36 with exposed pad down table 1. device summary order code operating temp. range package packaging TDA7491MV 0 to 70 c powersso-36 epd tube TDA7491MV13tr 0 to 70 c powersso-36 epd tape and reel www.st.com
contents TDA7491MV 2/28 doc id 14576 rev 2 contents 1 device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.1 compatibility with tda7491 stereo btl family . . . . . . . . . . . . . . . . . . . . 19 7 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.1 mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.2 gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.3 input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.4 internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.4.1 master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.4.2 slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.5 filterless modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.6 output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.7 protection function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.8 diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.9 heatsink requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
TDA7491MV list of tables doc id 14576 rev 2 3/28 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. powersso-36 slug down dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 7. mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 8. gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 9. how to set up synclk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 10. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
list of figures TDA7491MV 4/28 doc id 14576 rev 2 list of figures figure 1. internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. pin connection (top view, pcb view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. output power vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 4. thd vs output power (1 khz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 5. thd vs output power (100 hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 6. thd vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 7. frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 8. fft (0 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. fft (-60 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10. closed-loop gain vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 11. power dissipation and efficiency vs output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 12. attenuation vs mute voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 13. current consumption vs voltage on pin stby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 14. attenuation vs voltage on pin stby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 15. power supply rejection ratio vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5 figure 16. test board (tda7491hv) layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 17. powersso-36 slug down outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 18. applications circuit for class-d amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 19. standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 20. turn-on/off sequence for minimizing speaker ?pop? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 21. device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 22. master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 23. unipolar pwm output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 24. typical lc filter for a 8- ? speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 25. typical lc filter for a 4- ? speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 26. behavior of pin diag for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 27. power derating curves for pcb used as heatsink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
TDA7491MV device block diagram doc id 14576 rev 2 5/28 1 device block diagram figure 1 shows the block diagram of the TDA7491MV. figure 1. internal block diagram
pin description TDA7491MV 6/28 doc id 14576 rev 2 2 pin description 2.1 pin out figure 2. pin connection (top view, pcb view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 sub_gnd nc nc nc nc nc nc nc nc outn outn pvcc pvcc pgnd pgnd outp outp pgnd vss svcc vref sgnd vdds gain1 gain0 diag sgnd vdds synclk rosc inn inp mute stby vddpw svr exposed pad down
TDA7491MV pin description doc id 14576 rev 2 7/28 2.2 pin list table 2. pin description list number name type description 1 sub_gnd power connect to the frame 2,3 nc - no internal connection 4,5 nc - no internal connection 6,7 nc - no internal connection 8,9 nc - no internal connection 10,11 outn out negative pwm output 12,13 pvcc power power supply 14,15 pgnd power power stage ground 16,17 outp out positive pwm output 18 pgnd power power stage ground 19 vddpw out 3.3 v (nominal) regulator output referred to ground for power stage 20 stby input standby mode control 21 mute input mute mode control 22 inp input positive differential input 23 inn input negative differential input 24 rosc out master oscillator frequency-setting pin 25 synclck in/out clock in/out for external oscillator 26 vdds out 3.3 v (nominal) regulator output referred to ground for signal blocks 27 sgnd power signal ground 28 diag out open-drain diagnostic output 29 svr out supply voltage rejection 30 gain0 input gain setting input 1 31 gain1 input gain setting input 2 32 vdds power to be connected to vdds (pin 26) 33 sgnd power signal ground 34 vref out half vdds (nominal) referred to ground 35 svcc power signal power supply 36 vss out 3.3 v (nominal) regulator output referred to power supply
electrical specifications TDA7491MV 8/28 doc id 14576 rev 2 3 electrical specifications 3.1 absolute maximum ratings 3.2 thermal data 3.3 electrical specifications unless otherwise stat ed, the results in ta bl e 5 below are given for the conditions: v cc =18v, r l (load) = 8 ? , r osc = r3 = 39 k ? , c8 = 100 nf, f = 1 khz, g v = 20 db, and tamb = 25 c. table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage for pins pvcca, pvccb, svcc 24 v t op operating temperature 0 to 70 c t j junction temperature -40 to 150 c t stg storage temperature -40 to 150 c table 4. thermal data symbol parameter min typ max unit r th j-case thermal resistance, junction to case - 2 3 c/w r th j-amb thermal resistance, junction to ambient (mounted on recommended pcb) (1) 1. fr4 with vias to copper area of 9 cm 2 (see also section 7.9: heatsink requirements on page 26 ). -24- table 5. electrical specifications symbol parameter condition min typ max unit v cc supply voltage for pins pvcc, svcc -5-18v i q total quiescent without lc filter - 26 35 ma i qstby quiescent current in standby - - 2.5 5.0 a v os output offset voltage play mode -150 - 150 mv v os output offset voltage mute mode -60 - 60 mv i ocp overcurrent protection threshold r l = 0 ? 35- a t j junction temperature at thermal shut-down - - 150 - c r i input resistance differential input 55 60 - k ? v ovp overvoltage protection threshold - 19 21 - v
TDA7491MV electrical specifications doc id 14576 rev 2 9/28 v uvp undervoltage protection threshold - --4v r dson power transistor on resistance high side - 0.2 - ? low side - 0.2 - p o output power thd = 10% - 20 - w thd = 1% - 16 - p o output power r l = 8 ? , thd = 10% v cc =12v -9.5- w r l = 8 ? , thd = 1% v cc =12v -7.2- p o output power r l = 6 ? , thd = 10% v cc =16v -20- w r l = 6 ? , thd = 1% v cc =16v -16- p d dissipated power p o = 20 w thd = 10% - 2.0 - w efficiency p o = 20 w 80 90 - % thd total harmonic distortion p o = 1 w - 0.1 0.2 % g v closed loop gain gain0 = l, gain1 = l 18 20 22 db gain0 = l, gain1 = h 24 26 28 gain0 = h, gain1 = l 28 30 32 gain0 = h, gain1 = h 30 32 34 ? g v gain matching - -1 - 1 db en total input noise a curve, g v = 20 db - 20 - v f = 22 hz to 22 khz - 25 35 svrr supply voltage rejection ratio fr = 100 hz, vr = 0.5 v, c svr = 10 f 40 50 - db t r , t f rise and fall times - - 50 - ns f sw switching frequency internal oscillator 290 310 330 khz f swr output switching frequency with internal oscillator (1) 250 - - khz with external oscillator (2) 250 - - v inh digital input high (h) - 2.3 - - v v inl digital input low (l) - - 0.8 a mute mute attenuation v mute = 1 v 60 80 - db table 5. electrical specifications (continued) symbol parameter condition min typ max unit
electrical specifications TDA7491MV 10/28 doc id 14576 rev 2 function mode standby, mute and play modes v stby < 0.5 v, v mute = x standby - v stby > 2.5 v, v mute < 0.8 v mute - v stby > 2.5 v, v mute > 2.5 v play - 1. f sw = 10 6 / ((16 * r osc + 182) * 4) khz, f synclk = 2 * f sw with r3 = 39 k ? (see figure 18. ) 2. f sw = f synclk / 2 with the frequency of the external oscillator. table 5. electrical specifications (continued) symbol parameter condition min typ max unit
TDA7491MV characterization curves doc id 14576 rev 2 11/28 4 characterization curves the following characterization curves were made using the TDA7491MV demo board. the lc filter for the 8- ? load uses components of 33 h and 220 nf. all other test conditions are given along side the corresponding curves. figure 3. output power vs supply voltage figure 4. thd vs output power (1 khz) test condition : vcc = 5~18v, rl = 8 ohm, rosc =39k o , cosc =100nf, f =1khz, gv =30db, tamb =25 specification limit: typical: vs =18v,rl = 8 ohm po =20w @thd =10% po =16w @thd =1% output power vs. supply voltage(8 ohm) 0 2 4 6 8 10 12 14 16 18 20 22 5 6 7 8 9 101112131415161718 supply voltage (v) output power (w) output power vs. supply voltage(8 ohm) 0 2 4 6 8 10 12 14 16 18 20 22 5 6 7 8 9 101112131415161718 supply voltage (v) output power (w) thd =10% rl =8 ohm f =1khz thd =1% thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 30 200m 500m 1 2 5 10 20 test condition: vcc =18v, rl= 8 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, tamb =25 specification limit: typical: po =20w @ thd =10%
characterization curves TDA7491MV 12/28 doc id 14576 rev 2 figure 5. thd vs output power (100 hz) figure 6. thd vs frequency figure 7. frequency response thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 30 200m 500m 1 2 5 10 20 test condition: vcc =18v, rl= 8 ohm, rosc =39k , cosc =100nf, f =100hz, gv =30db, tamb =25 specification limit: typical: po =20w @ thd =10% frequency (hz) thd (%) 0.01 1 0.02 0.05 0.1 0.2 0.5 20 20k 50 100 200 500 1k 2k 5k 10k test condition: vcc =18v, rl= 8 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, po =1w tamb =25 specification limit: typical: thd<0.5% ampl (db) frequency (hz) -5 +2 -4 -3 -2 -1 -0 +1 10 30k 20 50 100 200 500 1k 2k 5k 10k specification limit: max: +/-3db @20hz to 20khz test condition: vcc =18v, rl= 8 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, po =1w tamb =25
TDA7491MV characterization curves doc id 14576 rev 2 13/28 figure 8. fft (0 db) figure 9. fft (-60 db) figure 10. closed-loop gain vs frequency frequency (hz) fft (db) -150 +10 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 20 20k 50 100 200 500 1k 2k 5k 10k specification limit: typical: >60db for the harmonic frequency test condition: vcc =18v, rl= 8 ohm, rosc =39k , cosc =100nf, f = 1khz, gv =30db, po =1w tamb =25 frequency (hz) fft (db) -150 +0 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k 50 100 200 500 1k 2k 5k 10k specification limit: typical: > 90db for the harmonic frequency test condition: vcc =18v, rl= 8 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, po = -60db (@ 1w =0db) tamb =25 test condition : vcc = 18v, rl = 8 ohm, rosc =39k o , cosc =100nf, 0db@f=1khz, po=1w, gv=32db, tamb =25 TDA7491MV 8ohm closed -loop gain vs freq .at27 -5 +0. -4.5 - -3. - -2. - -1. - -0. - d b r a 20 30k 50 100 200 500 1k 2k 5k 10k 20k hz vcc=18v, rload=8ohm, 0db@f=1khz, po=1w, gv=32db gain=32db gain=22db gain=26db gain=30db 5 4 5 3 5 2 5 1 5 0
characterization curves TDA7491MV 14/28 doc id 14576 rev 2 figure 11. power dissipation and efficiency vs output power figure 12. attenuation vs mute voltage figure 13. current consumption vs voltage on pin stby test condition : vcc = 18v, rl = 8 ohm, rosc =39k o , cosc =100nf, f =1khz, gv =30db, tamb =25 power dissipation & efficiency vs output power 0 10 20 30 40 50 60 70 80 90 0 5 10 15 20 output power per channel (w) efficiency (%) 0 0.5 1 1.5 2 2.5 3 3.5 4 dissipation power (w) power dissipation & efficiency vs output power 0 10 20 30 40 50 60 70 80 90 0 5 10 15 20 output power per channel (w) efficiency (%) 0 0.5 1 1.5 2 2.5 3 3.5 4 dissipation power (w) vcc=18v rload=8ohm gain=30db f=1khz test condition : vcc = 18v, rl = 8 ohm, rosc =39k o , cosc =100nf, 0db@f =1khz, po=1w gv =30db, tamb =25 attenuation vs mute voltage -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 0 0.5 1 1.5 2 2.5 3 3.5 mute voltage (v) attenuation (db) attenuation vs mute voltage -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 0 0.5 1 1.5 2 2.5 3 3.5 mute voltage (v) attenuation (db) vcc=18v rload=8ohm gain=30db 0db@f=1khz,po=1w test condition : vcc = 18v, rl = 8 ohm, rosc =39k o , cosc =100nf, vin=0, gv =30db, tamb =25 iquiescent vs standby voltage 0 5 10 15 20 25 30 0 0.5 1 1.5 2 2.5 3 3.5 standby voltage (v) iquiescent (ma) iquiescent vs standby voltage 0 5 10 15 20 25 30 0 0.5 1 1.5 2 2.5 3 3.5 standby voltage (v) iquiescent (ma) vcc=18v rload=8ohm gain=30db vin=0
TDA7491MV characterization curves doc id 14576 rev 2 15/28 figure 14. attenuation vs voltage on pin stby figure 15. power supply rejection ratio vs frequency test condition : vcc = 5~18v, rl = 8 ohm, rosc =39k o , cosc =100nf, 0db@f=1khz, po=1w, gv =30db, tamb =25 attenuation vs standby voltage -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 00.5 11.5 22.5 33.5 standby voltage (v) attenuation (db) attenuation vs standby voltage -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 00.5 11.5 22.5 33.5 standby voltage (v) attenuation (db) vcc=18v rload=8ohm gain=30db 0db@f=1khz,po=1w test condition : vcc = 18v, rl = 8 ohm, rosc =39k o , cosc =100nf, vin=0, gv =30db, tamb =25 -100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz t ripple frequency=100hz ripple voltage=500mv
characterization curves TDA7491MV 16/28 doc id 14576 rev 2 4.1 test board figure 16. test board (tda7491hv) layout
TDA7491MV package mechanical data doc id 14576 rev 2 17/28 5 package mechanical data the TDA7491MV comes in a 36-pin powersso package with exposed pad down. figure 17 below shows the package outline and ta bl e 6 gives the dimensions. figure 17. powersso-36 epd outline drawing h x 45
package mechanical data TDA7491MV 18/28 doc id 14576 rev 2 in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 6. powersso-36 epd dimensions symbol dimensions in mm dimensions in inches min typ max min typ max a 2.15 - 2.47 0.085 - 0.097 a2 2.15 - 2.40 0.085 - 0.094 a1 0.00 - 0.10 0.000 - 0.004 b 0.18 - 0.36 0.007 - 0.014 c 0.23 - 0.32 0.009 - 0.013 d 10.10 - 10.50 0.398 - 0.413 e 7.40 - 7.60 0.291 - 0.299 e - 0.5 - - 0.020 - e3 - 8.5 - - 0.335 - f - 2.3 - - 0.091 - g- - 0.10 - - 0.004 h 10.10 - 10.50 0.398 - 0.413 h- - 0.40 - - 0.016 k 0 - 8 degrees 0 - 8 degrees l 0.60 - 1.00 0.024 - 0.039 m - 4.30 - - 0.169 - n - - 10 degrees - - 10 degrees o - 1.20 - - 0.047 - q - 0.80 - - 0.031 - s - 2.90 - - 0.114 - t - 3.65 - - 0.144 - u - 1.00 - - 0.039 - x 4.10 - 4.70 0.161 - 0.185 y 6.50 - 7.10 0.256 - 0.280
TDA7491MV applications circuit doc id 14576 rev 2 19/28 6 applications circuit figure 18. applications circuit for class-d amplifier 6.1 compatibility with td a7491 stereo btl family TDA7491MV mono btl analog class-d amplifier is derived from the tda7491 stereo analog class-d btl family. TDA7491MV has only the left channel of the stereo btl family. in order to guarantee the pin to pin compatibility when moving the application from stereo to mono, it is necessary to connect the right channel inputs (pins 32 and 33 of tda7491 btl family) to v cc and gnd, that is, pin 32 to vdds and pin 33 to sgnd. TDA7491MV input settings for standby, mute and play: stby : mute mode 0 v : 0 v standby 0 v : 3.3 v standby 3.3 v : 0 v mute 3.3 v : 3.3 v play input settings for gain: gain0 : gain1 nominal gain 0 v : 0 v 20 db 0 v : 3.3 v 26 db 3.3 v : 0 v 30 db 3.3 v : 3.3 v 32 db
application information TDA7491MV 20/28 doc id 14576 rev 2 7 application information 7.1 mode selection the three operating modes of the TDA7491MV are set by the two inputs stby (pin 20) and mute (pin 21). z standby mode: all circuits are turned off, very low current consumption. z mute mode: inputs are connected to ground and the positive and negative pwm outputs are at 50% duty cycle. z play mode: the amplifiers are active. the protection functions of th e TDA7491MV are realized by pullin g down the voltages of the stby and mute inputs shown in figure 19 . the input current of the corresponding pins must be limited to 200 a. figure 19. standby and mute circuits figure 20. turn-on/off sequence for minimizing speaker ?pop? table 7. mode settings mode selection stby mute standby l (1) 1. drive levels defined in table 5: electrical s pecifications on page 8 x (don?t care) mute h (1) l play h h stby mute 0 v 3.3 v c7 2.2 f r2 30 k ? standby 0 v 3.3 v c15 2.2 f r4 30 k ? mute TDA7491MV
TDA7491MV application information doc id 14576 rev 2 21/28 7.2 gain setting the gain of the TDA7491MV is set by the two inputs, gain0 (pin 30) and gain1 (pin 31). internally, the gain is set by changing the feedback resistors of the amplifier. 7.3 input resistance and capacitance the input impedance is set by an internal resistor ri = 60 k ? (typical). an input capacitor (ci) is required to couple the ac input signal. the equivalent circuit and frequency response of the input components are shown in figure 21 . for ci = 220 nf the high-pass filter cut-off frequency is below 20 hz: fc = 1 / (2 * * ri * ci) figure 21. device input circuit and frequency response table 8. gain settings gain0 gain1 nominal gain, g v (db) 0020 0126 1030 1132 ri input ci rf input pin signal
application information TDA7491MV 22/28 doc id 14576 rev 2 7.4 internal and external clocks the clock of the class-d amplifier can be generated internally or can be driven by an external source. if two or more class-d amplifiers are used in the same system, it is recommended that all devices operate at the same clock frequency. this can be implemented by using one TDA7491MV as master clock, while the other devices are in slave mode (that is, externally clocked. the clock interconnect is via pin synclk of each device. as explained below, synclk is an output in master mode and an input in slave mode. 7.4.1 master mode (internal clock) using the internal oscillator, th e output switching frequency, f sw , is controlled by the resistor, r osc , connected to pin rosc: f sw = 10 6 / ((16 * r osc + 182) * 4) khz where r osc is in k ? . in master mode, pin synclk is used as a clock output pin, whose frequency is: f synclk = 2 * f sw for master mode to operate correctly then resistor r osc must be less than 60 k ? as given below in ta b l e 9 . 7.4.2 slave mode (external clock) in order to accept an external clock input the pin rosc must be left open, that is, floating. this forces pin synclk to be internally configured as an input as given in ta bl e 9 . the output switching frequency of the slave devices is: f sw = f synclk / 2 figure 22. master and slave connection table 9. how to set up synclk mode rosc synclk master r osc < 60 k ? output slave floating (not connected) input synclk rosc rosc cosc rosc synclk 39 k ? 100 nf output input master slave TDA7491MV TDA7491MV
TDA7491MV application information doc id 14576 rev 2 23/28 7.5 filterless modulation the output modulation scheme of the btl is called unipolar pulse width modulation (pwm). the differential output voltages change between 0 v and +v cc and between 0 v and -v cc . this is in contrast to the traditional bipolar pwm outputs which change between +v cc and -v cc . an advantage of this scheme is that it effectively doubles the switching frequency of the differential output waveform. the outp and outn are in the same phase when the input is zero, then the switching current is low and the loss in the load is small. in practice, a short delay is introduced between these two outputs in order to avoid the btl output switching at the same time. TDA7491MV can be used without a filter before the speaker, because the frequency of the TDA7491MV output is beyond the audio frequency, the audio signal can be recovered by the inherent inductance of the speaker and natural filter of the human ear. figure 23. unipolar pwm output inp inn outp outn differential out
application information TDA7491MV 24/28 doc id 14576 rev 2 7.6 output low-pass filter to avoid emi problems, it may be necessary to use a low-pass filter before the speaker. the cutoff frequency should be larger than 22 khz and much lower than the output switching frequency. it is necessary to choose the l-c component values depending on the loud speaker impedance. some typical values, which give a cut-off frequency of 27 khz, are shown in figure 24 and figure 25 below. figure 24. typical lc filter for a 8- ? speaker figure 25. typical lc filter for a 4- ? speaker
TDA7491MV application information doc id 14576 rev 2 25/28 7.7 protection function the TDA7491MV is fully protected against overvoltages, undervoltages, overcurrents and thermal overloads as explained here. overvoltage protection (ovp) if the supply voltage exceeds the value for v ovp given in table 5: electrical specifications on page 8 the overvoltage protection is activated which forces the outputs to the high-impedance state. when the supply voltage drops to below the threshold value the device restarts. undervoltage protection (uvp) if the supply voltage drops below the value for v uvp given in table 5: electrical specifications on page 8 the undervoltage protection is activated which forces the outputs to the high-impedance state. when the supply voltage recovers the device restarts. overcurrent protection (ocp) if the output current exceeds the value for i ocp given in table 5: electrical specifications on page 8 the overcurrent protection is activated which forces the outputs to the high-impedance state. periodically, the device attempts to restart. if the overcurrent condition is still present then the ocp remains active. the restart time, t oc , is determined by the r-c components connected to pin stby. thermal protection (otp) if the junction temperature, t j , reaches 145 c (nominal), the device goes to mute mode and the positive and negative pwm outputs are forced to 50% duty cycle. if the junction temperature exceeds the value for tj given in table 5: electrical spec ifications on page 8 the device shuts down and the output is forced to the high impedance state. when the device cools sufficiently the device restarts. 7.8 diagnostic output the output pin diag is an open drain transistor. when the protection is activated it is in the high-impedance state. the pin can be connected to a power supply (< 18 v) by a pull-up resistor whose value is limited by the maximum sinking current (200 a) of the pin. figure 26. behavior of pin diag for various protection conditions TDA7491MV protection logic r1 diag vdd vdd overcurrent protection restart restart ov, uv, ot protection
application information TDA7491MV 26/28 doc id 14576 rev 2 7.9 heatsink requirements a thermal resistance of 24 c/w can be obtained using the pcb copper ground layer with 16 vias connecting it to the contact area for the exposed pad. ensure that the copper ground area is a nominal 9 cm 2 for 24 c/w. figure 27 shows the derating curves for copper areas of 4 cm 2 and 9 cm 2 . as with most amplifiers, the power dissipated within the device depends primarily on the supply voltage, the load impedance and the output modulation level. the maximum estimated power dissipation for the TDA7491MV is less than 4 w. when properly mounted on the above pcb the junction temperature could increase by 96 c. however, with a musical program the dissipated power is about 40% less, leading to a temperature increase of around 60 c. even at the maximum recommended ambient temperature for consumer applications of 50 c there is still a clear safe ty margin before the maximum junction temperature (150 c) is reached. figure 27. power derating curves for pcb used as heatsink 0 1 2 3 4 5 6 7 8 0 20 40 60 80 100 120 140 160 g pd (w) tamb ( c) copper area 2x2 cm and via holes tda7491p psso36 copper area 3x3 cm and via holes TDA7491MV powersso-36
TDA7491MV revision history doc id 14576 rev 2 27/28 8 revision history table 10. document revision history date revision changes 21-oct-2008 1 initial release. 29-may-2009 2 updated text concerning oscillator r and c in section 3.3: electrical specifications on page 8 updated test condition for iq, added v uvp , updated stby and mute voltages and rectified several anomalies in ta bl e 5 : electrical specifications on page 8 updated equation for f sw on page 10 and on page 22 updated figure 16: test board (tda7491hv) layout on page 16 updated figure 17: powersso-36 epd outline drawing on page 17 and table 6: powersso-36 epd dimensions on page 18 updated figure 18: applications circuit for class-d amplifier on page 19
TDA7491MV 28/28 doc id 14576 rev 2 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2009 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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